Theodore W. Manikas

Experience

Certification

Education

Organizations

Current Funding

  1. T. Manikas, "Hybrid Circuit Design for Oil and Gas Well Gauges", OCAST (Oklahoma Center for the Advancement of Science and Technology) project number AP071-i14, 3/1/07 - 2/29/08, $37,142 (50% from OCAST, 50% from Geophysical Research Co, LLC).
  2. P. LoPresti, T. Manikas, J. Kohlbeck, "Summer Electrical Engineering Academy at The University of Tulsa for Precollege Students", OSRHE (Oklahoma State Regents for Higher Education), 2007 - 2009, $31,500.
  3. K. Ashenayi, T. Manikas, P. LoPresti, "A Proposal to Develop an Advanced Down-hole Communication System", Champlin Foundation, 1/1/07 - 12/31/08, $30,000.
  4. K. Ashenayi, T. Manikas, "Specialized Electronic Wheelchair for a Cerebral Palsy Patient", Assistive Technology Development Program of the American Society for Engineering Education (ASEE) and National Institute for the Severely Handicapped (NISH), 2008, $250.

Recent Publications

  1. "COOLER- A Fast Multiobjective Fixed-outline Thermal Floorplanner", D. Chatterjee, T.W. Manikas, I. Markov, Proc. 3rd Annual Austin Conf. on Integrated Systems & Circuits (ACISC-08), May 2008. (PDF)
  2. "Nanobattery-crossbar system, a promising candidate for future nanoscale data storage", P.C. Utekar, T.W. Manikas, and D. Teeters, Proc 213th ECS (ElectroChemical Society) Meeting, 2008.
  3. "Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells", T.W. Manikas and D. Teeters, Proc. 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL-08),  2008. (PDF)
  4. "Genetic Algorithms for Autonomous Robot Navigation", T.W. Manikas, K. Ashenayi, R.L. Wainwright, IEEE Instrumentation & Measurement Magazine, vol. 10, no. 6, Dec. 2007, pp. 26-31. [Invited Paper] (PDF)
  5. "Developing and Funding Undergraduate Engineering Internships", T.W. Manikas and G.R. Kane, Proceedings of the 2007 ASEE Midwest Section Conference,  2007. (PDF)
  6. "Nanoscale Power and Memory Unit Design for Nanoscale Sensor Systems", T.W. Manikas and D. Teeters, Proceedings of the 53rd ISA Int. Instrumentation Symp., 2007. (PDF)
  7. "A Genetic Algorithm for Non-Slicing Floorplan Representation", D. Chatterjee and T.W. Manikas, Proceedings of National Conference on Intelligent Systems (NCIS),  2007. (PDF)
  8. "Power-Density Aware Floorplanning for Reducing Maximum On-Chip Temperature", D. Chatterjee and T.W. Manikas, Proceedings of 18th IASTED International Conference on Modelling and Simulation (ICMS), pp. 319-324,  2007. (PDF)
  9. "Evolving a Diverse Collection of Robot Path Planning Problems", D.A. Ashlock, T.W. Manikas, and K. Ashenayi, Proc. 2006 IEEE Congress on Evolutionary Computation (CEC2006), p. 1837-1844 (PDF)
  10. "A Genetic Algorithm for Binary Decision Diagram Variable Ordering", C.M. Linnet and T.W. Manikas, Proc. 81st AAAS - SWARM Conf., 2006.
  11. "Benchmarking of Robot Path Planning Algorithms", A. Hand, J. Godugu, K. Ashenayi, T.W. Manikas, and R.L. Wainwright, in Intelligent Engineering Systems Through Artificial Neural Networks: Smart Engineering Systems Design: Neural Networks, Fuzzy Logic, Evolutionary Programming, Complex Systems and Artificial Life, C.H. Dagli, et al., Editors. 2005, ASME Press: New York. (PDF)
  12. "Developing Laboratory Courses in a Resource-Constrained Environment", T.W. Manikas, D.E. Jussaume, and G.R. Kane, Proceedings of the 2005 ASEE Midwest Section Conference, University of Arkansas, Sept. 14-16, 2005. (PDF)
  13. “Autonomous Robot Navigation Using a Genetic Algorithm with an Efficient Genotype Structure”, A. Hermanu, T.W. Manikas, K. Ashenayi, and R.L. Wainwright, in Intelligent Engineering Systems Through Artificial Neural Networks: Smart Engineering Systems Design: Neural Networks, Fuzzy Logic, Evolutionary Programming, Complex Systems and Artificial Life, C.H. Dagli, et al., Editors. 2004, ASME Press: New York. p. 319-324. (PDF)
  14. "Developing Graduate Research Skills using Guided Reading Assignments", T.W. Manikas and G.R. Kane, Proc. 39th ASEE Midwest Section Conf., 2004. (PDF)
  15. "Autonomous Local Path Planning for a Mobile Robot Using a Genetic Algorithm", K. H-Sedighi, K. Ashenayi, T.W. Manikas, R.L. Wainwright, H.M. Tai, Proc. 2004 IEEE Congress on Evolutionary Computation (CEC2004), p. 1338-1345. (PDF)
  16. "A VLSI Design Course in a Resource-Constrained Environment", T.W. Manikas and G.R. Kane, Proc. 38th ASEE Midwest Section Conf., 2003. (PDF)
  17. "Partitioning Effects on Placement Performance for VLSI Design", T.W. Manikas and G.R. Kane, Proc. 78th Annual AAAS - SWARM Conf., 2003.
  18. "A Digital Logic Design Laboratory for Electrical Engineering and Computer Science Undergraduates", T.W. Manikas, G.R. Kane, and J.G. Kohlbeck, Proc. 37th ASEE Midwest Section Conf., 2002. (PDF)
  19. "A Genetic Algorithm for Mixed Macro and Standard Cell Placement", T.W. Manikas and M.H. Mickle, Proc. 45th IEEE Int. Midwest Symp. on Circuits and Systems, 2002, p. 115-118. (PDF)
  20. "Autonomous Robot Navigation System Using a Novel Value Encoded Genetic Algorithm", T. Geisler and T.W. Manikas, Proc. 45th IEEE Int. Midwest Symp. on Circuits and Systems, 2002, p. 45-48. (PDF)
  21. "Channel Height Estimation in VLSI Design", L. Li, T.W. Manikas, and H. Jin, Proc. 45th IEEE Int. Midwest Symp. on Circuits and Systems , 2002, p. 611-614. (PDF)
  22. "Partitioning Effects on Estimated Wire Length for Mixed Macro and Standard Cell Placement", T.W. Manikas and G.R. Kane, Proc. 11th IEEE/ACM Int. Workshop on Logic & Synthesis (IWLS '02), 2002, p. 27-30. (PDF)
  23. "Standard Cell Partition Size Variance and its Effect on Physical Design", T.W. Manikas and G.R. Kane, Proc. 10th IEEE Int. Workshop on Logic & Synthesis (IWLS '01), 2001, p. 265-268. (PDF)
  24. "A Senior Design Course That Simulates an Industrial Engineering Environment", M.O. Durham and T.W. Manikas, Proc. 36th ASEE Midwest Section Conf. , 2001. [Best Paper Award] (PDF)
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This page last updated 2008 Jul 1